光学 精密工程, 2012, 20 (3): 632, 网络出版: 2012-04-16
显示信息高速串行传输的差错控制
Error control of high speed serial display data transmission
高速串行传输 循环码 误码率 差错控制 现场可编程门阵列 high speed serial transmission cyclic code bit error rate error control Field Programming Gate Array (FPGA)
摘要
提出了差错控制编码方法来解决LED大屏幕远程通信系统显示信息高速率串行传输数据可靠性降低的问题。考虑到显示信息发送端和接收端的硬件基础及实现要求不同,提出在发送端采用并行算法结构,并构造了生成矩阵进行编码运算来提高算法的实时性;在接收端采用双时钟串行循环译码电路结构,在伴随式计算后采用高速时钟进行纠错,使得码字较长的编码仍旧能够获得较低的硬件开销并具备较好的实时译码能力。实验及理论分析表明,提出的方案能够实现高效率的编解码运算,编码效率达到98.2%。该方案也有效地降低了误码率,实际应用中误码率至少降低了1个数量级。使用提出的方案实现了显示信息的高速率、高效率串行传输。
Abstract
An error control coding method is proposed to improve the reliability of serial data transmission for the display information of a LED large screen remote communication system. Considering the difference of the hardware basis and the implementation requirements between a transmitter and a receiver, a parallel algorithm structure is presented at the information transmitter,and the generating coding matrix is deduced to improve the real time performance of the coding algorithm. Moreover, a dual clock serial circulation decoding structure is presented at the information receiver, in which the high-speed clock after serial syndrome computation is used to correct the error bit to allow the long codeword to obtain a low hardware overhead and real time processing ability. Practice and theoretical analysis shows that the designed scheme can accomplish a high effective coding in efficiency of 98.2%, and can reduce the bit error rate effectively at least 1 order of magnitude in the application. The scheme can achieve high efficient serial transmission of display information.
邓春健, 安源, 吕燚, 李文生, 邹坤. 显示信息高速串行传输的差错控制[J]. 光学 精密工程, 2012, 20(3): 632. DENG Chun-jian, AN Yuan, L Yi, LI Wen-sheng, ZOU kun. Error control of high speed serial display data transmission[J]. Optics and Precision Engineering, 2012, 20(3): 632.