光电工程, 2012, 39 (10): 143, 网络出版: 2012-11-22   

FPGA软硬件协同处理实时图像处理系统

Real-time Image Processing System Using FPGA with Hardware Software Collaborative Processing
作者单位
电子科技大学光电信息学院, 成都 610054
摘要
基于PC机图像处理系统实时性不强, DSP+FPGA图像处理系统的成本高、资源利用率低, 单纯使用 FPGA硬件实现的图像算法类型较为单一, 针对这一系列问题, 提出了一种基于 FPGA软硬件协同处理的实时图像处理系统。采用一片 FPGA芯片作为系统的核心, 利用 CCD相机等采集图像, 通过 SSRAM将图像缓存, 以 SOPC为控制核心, 协调软硬件共同进行图像处理。易于使用硬件实现的图像处理模块 (如滤波、形态学算法、图像校正、边缘检测等 )均使用 Verilog HDL语言实现, 通过 SOPC控制这些图像处理模块, 实现相应的图像处理功能; 而硬件难于实现的部分 (如流程控制、复杂的分支判断 )则使用 SOPC中的 CPU来实现。实验表明, 系统实时性强、图像处理速度快、可进行复杂图像算法的运算, 同时具有设计简单、应用灵活、成本低的特点。
Abstract
In order to overcome the problem that image processing systems based on PC is weak in real-time processing, and systems based on DSP and FPGA cost a lot and inadequate use of resources, a design of real-time image processing system using FPGA with hardware software collaborative processing is proposed. The system uses an FPGA chip as the core of the system, a CCD camera to do image acquisition, and SSRAM to cache the image. SOPC is the control of the core, coordinating hardware and software to processing image. Image processing modules which are easy to use hardware implementation (such as filtering, morphological algorithm, image correction, edge detection, etc.) use the Verilog HDL language to implement. The SOPC is used to control these image processing modules. The image processing functions whose hardware is difficult to achieve (such as process control, complex branching to determine) use the SOPC. The experiment shows the high speed and real-time of the image processing system, and the ability on computation of complex image algorithms. Moreover, it is simple in design, flexible in application and low in cost.

沈淦松, 叶玉堂, 刘霖, 刘娟秀. FPGA软硬件协同处理实时图像处理系统[J]. 光电工程, 2012, 39(10): 143. SHEN Gan-song, YE Yu-tang, LIU Lin, LIU Juan-xiu. Real-time Image Processing System Using FPGA with Hardware Software Collaborative Processing[J]. Opto-Electronic Engineering, 2012, 39(10): 143.

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