通过有限元分析研究了单个硅通孔及两片芯片堆叠模型的热应力。采用单个硅通孔模型证实了应力分布受填充材料(铜, 钨)的影响, 提出钨在热应力方面的优越性, 确定了硅通孔尺寸(通孔直径、深宽比等因素)与热应力大小间的对应关系。为寻找拥有最佳热应力的材料组合, 采用两片芯片堆叠的二维模型, 对常用材料的组合进行了仿真分析, 发现以二氧化硅为隔离层, 钨为填充金属, 锡为键合层的模型具有最理想的热应力特性, 此外, 铜、ABF以及锡的组合也表现出良好的热应力特性。

The thermo-mechanical stress of both single Through-Silicon Via (TSV) and two-chip-stacked package was investigated with the use of finite element analysis. Stress distributions were demonstrated to be affected by filling materials (copper and tungsten), and the advantages of tungsten-filled TSVs on thermal stress were found. Stress values were proved to be relevant to TSV sizes, such as TSV diameters and aspect ratios of the silicon thickness and the TSV diameter. In order to find the material collocation which has the smallest thermal stress, two-chip-stacked model was applied to simulate the stress in common used materials. It is found that the structure using silicon dioxide as the insulation layer, tungsten as the filling and tin (Sn) as the bonding materials yields the best mechanical performance. Besides, the combination of copper, ABF and tin also performs well in stress.