太赫兹科学与电子信息学报, 2015, 13 (2): 352, 网络出版: 2016-01-25
基于 FPGA嵌入式的 SRAM测试方法
A novel SRAM test method based on embedded implementation on FPGA
静态随机存储器 现场可编程门阵列 嵌入式 可靠性 高速电路 Static Random Access Memory Field Programmable Gate Array embedded system reliability high -speed circuits
摘要
随着航天技术的发展,嵌入式系统设计在航天上得到了越来越广泛的应用。静态随机存储器(SRAM)作为使用最为广泛的存储器之一,由于其高速低功耗的优良特性,在航天领域被广泛使用。目前,其功能测试还依赖于通过使用 VHDL/Verilog编写测试端口来完成,不仅开发效率低,而且很难保证测试结果的可靠性。本文提出了一种通过嵌入式开发的方式完成对静态随机存储器(SRAM)功能测试的方法,测试方法基于可复用的 IP技术,大大提高了测试数据传输效率。通过这种方法, SRAM测试系统的二次开发基于应用层而不是底层逻辑层,大大简化了系统设计。这样不仅提高了测试效率,而且具有较好的可靠性、可配置性以及可移植性,大大降低了系统的研发成本。测试系统的可行性和有效性已经得到了实验验证。
Abstract
With the development of satellite based remote sensors, embedded systems become more and more popular in space camera electronics. Static Random Access Memory(SRAM) is one kind of the most widely used memories due to its merits of high efficiency and low power dissipation, but testing its function still depends on writing testing modules with hardware description language, which results in low developing efficiency and low reliability. In this paper, an embedded testing method is proposed, which is based on MicroBlaze and its speed increasing function design. Implementation of the test method is based on reusable Intellectual Property(IP) technique and greatly improves data transfer speed. With this method, secondary development of SRAM test system can be made in application layer instead of fundamental logical layer, which simplifies the system design. It is not only more efficient and more reliable, but also easier to transplant, which greatly reduces test design cost. The validity and feasibility of the method have been proved by test results.
张京晶, 陈佳, 万旻. 基于 FPGA嵌入式的 SRAM测试方法[J]. 太赫兹科学与电子信息学报, 2015, 13(2): 352. ZHANG Jingjing, CHEN Jia, WAN Min. A novel SRAM test method based on embedded implementation on FPGA[J]. Journal of terahertz science and electronic information technology, 2015, 13(2): 352.