为改善无边框液晶模组L0漏光, 本文通过对影响面板透过率的液晶材料、PI原材、ODF工艺、PI涂布及其摩擦工艺等诸多因素研究, 筛选出预固化温度＆时间、PI膜厚、TFT ＆ CT面摩擦强度、TFT ＆ CT摩擦布共7个影响因子; 选择面板翘曲度为噪声因子, 通过量测不同程度L0漏光对应的面板翘曲, 并对L0漏光程度与翘曲进行二次拟合, 以此分别选取翘曲为1.8~2.1 μm及6.4~8.0 μm的面板作为噪声因子高低水平。按L8设计田口实验, 采用Jump14运行试验结果, 结果显示, 预固化温度设置为140 ℃, 预固化时间设置为130 s, PI膜厚设置为75 nm, TFT面摩擦强度设置为14 mm, CF 面摩擦强度设置为15.5 mm, 其他参数维持量产条件, S/N可得到最大值-2.63。该条件下实际平均漏光水平从参数调整前的2.25下降到调整后的1.04。特别地, 在漏光高发的翘曲区域, 即6.4~8.0 μm时, L0漏光均值从3.07下降到1.7, 预测漏光程度大于level 3的不良率从6.2%下降到0.2%。

In order to decrease incidence ratio of L0 light leakage in borderless module, Seven impact factors(Pre-bake temp.＆time, PI thickness, TFT ＆ CF nip, TFT ＆ CT rubbing Cloth)are filtrated by studying LC, PI, ODF, PI coating and rubbing processes. Also, warships of 1.8~2.1 μm and 6.4~8.0 μm are chosen as noise factor’s low ＆ high level based on quadratic fit between L0 leakage level and warship. A L8 Taguchi experiment is designed and run by Jump 14. The result shows that a max S/N of ~2.63 can be obtained when pre-bake temperature set to 140 ℃, pre-bake time set to 130 s, PI thickness set to 75 nm, TFT nip set to 14 mm, CF nip set to 15.5 mm and other parameters are the same as MP conditions. And the L0 leakage’s average level decreases from 2.25 to 1.04. Particularly, among 6.4~8.0 μm warships where is the L0 leakage high-incidence areas, the L0 leakage’s average level decrease from 3.07 to 1.04, and its corresponding predicted reject ratio over Level 3 drops from 6.2% to 0.2%.