电光与控制, 2019, 26 (10): 106, 网络出版: 2020-12-18  

基于分级容错技术的高完整计算机系统设计

High-Integrity Computer System Design Based on Hierarchical Fault-Tolerant Technology
作者单位
中国航空计算技术研究所, 西安 710068
摘要
对国内外三代机、四代机及民机中的机载安全性关键系统发展情况进行深入分析, 总结了多通道表决、比较对故障静默等典型容错计算机架构的技术特点, 围绕新一代飞机对机载安全关键计算机系统的可靠性、容错能力、故障检测隔离能力、实时性的新挑战, 提出了基于分级容错技术实现的高完整计算机系统设计思路, 描述了分层分级实现高完整性容错的设计原理, 并对其所涉及的Lock-step技术、时间触发网络等关键技术给出了解决途径, 可满足下一代飞行器的发展需要, 提升机载安全关键计算机系统的安全性、可靠性。
Abstract
A detailed analysis is made to the development of airborne safety-critical system onboard the third and the fourth generation civil aircrafts at home and abroad. The technical characteristics of such typical fault-tolerant technology as the multi-channel voting etc. are summarized.Aiming at the challenges of the new-generation aircrafts on the reliability, fault-tolerant capability, fault-detection/fault-isolation capability, and real-time performance of the airborne safety-critical computer systems, a design idea of a high-integrity computer system based on hierarchical fault-tolerant technology is proposed.The design principle of the hierarchical high-integrity fault-tolerant system is described, and the critical technologies of Lock-step and time-trigger network are given. The strategy can satisfy the development requirements of the next-generation aircrafts, and can improve the safety and reliability of the airborne safety-critical computer systems.

解文涛, 王锐. 基于分级容错技术的高完整计算机系统设计[J]. 电光与控制, 2019, 26(10): 106. XIE Wentao, WANG Rui. High-Integrity Computer System Design Based on Hierarchical Fault-Tolerant Technology[J]. Electronics Optics & Control, 2019, 26(10): 106.

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