设计并制作了一款应用于IEEE 200/400 GbE标准802.3 bs的阵列波导光栅.该阵列波导光栅使用2.0%的超高折射率差硅基二氧化硅材料，使得芯片尺寸及损耗较小.为了获得平坦化的接收光谱，将输出波导进行展宽，采用多模波导结构，激发若干个高阶模，数个模式叠加使得原本高斯状的光谱顶部产生平坦化，形成箱形接收光谱.设计的阵列波导光栅的中心波长为1 291.10 nm，通道间隔为800 GHz，芯片尺寸为11 mm×4 mm.经过等离子增强化学气相沉积和感应耦合等离子刻蚀工艺制备了芯片，测试结果表明最小的插入损耗为－3.3 dB，相邻通道间串扰小于－20 dB，单通道1 dB带宽在2.12~3.06 nm范围，实现了良好的解复用和平坦化效果，在实际光通信系统中有一定的实用价值.

An arrayed waveguide grating ,which is applied to IEEE 200/400 GbE standard 802.3 bs, is designed and manufactured. The arrayed waveguide grating uses the silica-on-silicon material, which has 2.0% ultra-high refractive index difference, making the less chip size and insertion loss. In addition, in order to obtain a flattened receiving spectrum, the output waveguides are widened and the multimode waveguide structures are used to excite a few of higher order modes. Several patterns are overlaid so that the top of the original Gaussian spectrum is flattened and forms a box-like receiving spectrum. At last, the designed center wavelength of the arrayed waveguide grating is 1 291.10 nm, the channel spacing is 800 GHz, and the device size is 11 mm×4 mm. The microchip is manufactured by plasma enhanced chemical vapor deposition and inductively coupled plasma etching. The test results show that, the minimum insertion loss is about －3.3 dB, the crosstalk between adjacent channels is less than －20 dB, and the single channel 1 dB bandwidth ranging from 2.12 nm to 3.06 nm, realizing a good wavelength demultiplexing and flattening effect, and having a certain practical value in the actual optical communication system.