边沿触发器亚稳态现象的实验观测
[1] Horstmann J U, Eichel H W, Coates R L. Metastability behavior of CMOS ASIC flip-flops in theory and test[J]. IEEE J. of Solid-State Circuits, 1989, 24(1): 146-157.
[2] Kleeman L, Cantoni A. Metastable behavior in digital systems[J]. IEEE Design & Test of Computers, 1987, 4(6): 4-19.
[3] 李 立, 龙泳涛, 曾钢燕, 等. 可编程逻辑器件设计中的亚稳态问题及解决方案[J]. 湘潭大学自然科学学报, 2009, 31(1): 125-129.
Li Li, Long Yongtao, Zeng Gangyan, et al. The metastability and solutions method in CPLD design[J]. Natural Science J. of Xiangtan University, 2009, 31(1): 125-129.
[4] 黄隶凡, 郑学仁. FPGA设计中的亚稳态研究[J]. 微电子学, 2011, 41(2): 265-268.
Huang Lifan, Zheng Xueren. Study on metastability in FPGAdesign[J]. Microelectronics, 2011, 41(2): 265-268.
[5] Kleeman L, Cantoni A. Metastable behavior in digital systems[J]. IEEE Design & Test of Computers, 1987, 4(6): 4-19.
[6] Rosenberger F,Chaney T J. Flip-flop resolving time test circuit[J]. IEEE J. of Solid-State Circuits, 1982, 17(4): 731-738.
[7] Kinniment D, Heron K, Russell G. Measuring deep metastability[C]// IEEE Inter. Symp. Asynchronous Circuits and Systems of Computer Society, 2006: 2.
[8] Fairchild Semiconductor. 74LS74 Datasheet[DB/OL]. www.fairchildsemi.com
[9] Fairchild Semiconductor. 74HC74 Datasheet[DB/OL].www.fairchildsemi.com
侯凤妹, 李长安, 赵刚. 边沿触发器亚稳态现象的实验观测[J]. 半导体光电, 2018, 39(6): 806. HOU Fengmei, LEE Changan, ZHAO Gang. Experimental Observation of Metastable Phenomena of Edge Triggered Flip Flops[J]. Semiconductor Optoelectronics, 2018, 39(6): 806.