In this letter, high power density AlGaN/GaN high electron-mobility transistors (HEMTs) on a freestanding GaN substrate are reported. An asymmetric Γ-shaped 500-nm gate with a field plate of 650 nm is introduced to improve microwave power performance. The breakdown voltage (BV) is increased to more than 200 V for the fabricated device with gate-to-source and gate-to-drain distances of 1.08 and 2.92 μm. A record continuous-wave power density of 11.2 W/mm@10 GHz is realized with a drain bias of 70 V. The maximum oscillation frequency (f_max) and unity current gain cut-off frequency (f_t) of the AlGaN/GaN HEMTs exceed 30 and 20 GHz, respectively. The results demonstrate the potential of AlGaN/GaN HEMTs on free-standing GaN substrates for microwave power applications.

The comparison of domestic and foreign studies has been utilized to extensively employ junction termination extension (JTE) structures for power devices. However, achieving a gradual doping concentration change in the lateral direction is difficult for SiC devices since the diffusion constants of the implanted aluminum ions in SiC are much less than silicon. Many previously reported studies adopted many new structures to solve this problem. Additionally, the JTE structure is strongly sensitive to the ion implantation dose. Thus, GA-JTE, double-zone etched JTE structures, and SM-JTE with modulation spacing were reported to overcome the above shortcomings of the JTE structure and effectively increase the breakdown voltage. They provided a theoretical basis for fabricating terminal structures of 4H-SiC PiN diodes. This paper summarized the effects of different terminal structures on the electrical properties of SiC devices at home and abroad. Presently, the continuous development and breakthrough of terminal technology have significantly improved the breakdown voltage and terminal efficiency of 4H-SiC PiN power diodes.

This work demonstrates high-performance NiO/β-Ga₂O₃ vertical heterojunction diodes (HJDs) with double-layer junction termination extension (DL-JTE) consisting of two p-typed NiO layers with varied lengths. The bottom 60-nm p-NiO layer fully covers the β-Ga₂O₃ wafer, while the geometry of the upper 60-nm p-NiO layer is 10 μm larger than the square anode electrode. Compared with a single-layer JTE, the electric field concentration is inhibited by double-layer JTE structure effectively, resulting in the breakdown voltage being improved from 2020 to 2830 V. Moreover, double p-typed NiO layers allow more holes into the Ga₂O₃ drift layer to reduce drift resistance. The specific on-resistance is reduced from 1.93 to 1.34 mΩ·cm². The device with DL-JTE shows a power figure-of-merit (PFOM) of 5.98 GW/cm², which is 2.8 times larger than that of the conventional single-layer JTE structure. These results indicate that the double-layer JTE structure provides a viable way of fabricating high-performance Ga₂O₃ HJDs.

A new SiC superjunction power MOSFET device using high-k insulator and p-type pillar with an integrated Schottky barrier diode (Hk-SJ-SBD MOSFET) is proposed, and has been compared with the SiC high-k MOSFET (Hk MOSFET), SiC superjuction MOSFET (SJ MOSFET) and the conventional SiC MOSFET in this article. In the proposed SiC Hk-SJ-SBD MOSFET, under the combined action of the p-type region and the Hk dielectric layer in the drift region, the concentration of the N-drift region and the current spreading layer can be increased to achieve an ultra-low specific on-resistance (R_on,sp). The integrated Schottky barrier diode (SBD) also greatly improves the reverse recovery performance of the device. TCAD simulation results indicate that theR_on,sp of the proposed SiC Hk-SJ-SBD MOSFET is 0.67 mΩ·cm² with a 2240 V breakdown voltage (BV), which is more than 72.4%, 23%, 5.6% lower than that of the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET with the 1950, 2220, and 2220 V BV, respectively. The reverse recovery time and reverse recovery charge of the proposed MOSFET is 16 ns and18 nC, which are greatly reduced by more than 74% and 94% in comparison with those of all the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET, due to the integrated SBD in the proposed MOSFET. And the trade-off relationship between theR_on,sp and the BV is also significantly improved compared with that of the conventional MOSFET, Hk MOSFET and SJ MOSFET as well as the MOSFETs in other previous literature, respectively. In addition, compared with conventional SJ SiC MOSFET, the proposed SiC MOSFET has better immunity to charge imbalance, which may bring great application prospects.

提出了一种基于0.35 μm高压CMOS工艺的线性雪崩光电二极管（Avalanche Photodiode，APD）。APD采用了横向分布的吸收区-电荷区-倍增区分离（Separate Absorption，Charge and Multiplication，SACM）的结构设计。横向SACM结构采用了高压CMOS工艺层中的DNTUB层、DPTUB层、Pi层和SPTUB层，并不需要任何工艺修改，这极大的提高了APD单片集成设计和制造的自由度。测试结果表明，横向SACM线性APD的击穿电压约为114.7 V。在增益M = 10和M = 50时，暗电流分别约为15 nA和66 nA。有效响应波长范围为450 ~ 1050 nm。当反向偏置电压为20 V，即M = 1时，峰值响应波长约为775 nm。当单位增益（M = 1）时，在532 nm处的响应度约为最大值的一半。