太赫兹科学与电子信息学报, 2018, 16 (1): 170, 网络出版: 2018-07-24  

FIR基于 FPGA的高并行度 DA结构

FPGA based high parallelism DA architecture for FIR
作者单位
1 中国科学院电子学研究所,北京 100190
2 中国科学院大学,北京 100049
引用该论文

林跃杉, 林郁, 尹韬, 黄志洪, 杨海钢. FIR基于 FPGA的高并行度 DA结构[J]. 太赫兹科学与电子信息学报, 2018, 16(1): 170.

LIN Yueshan, LIN Yu, YIN Tao, HUANG Zhihong, YANG Haigang. FPGA based high parallelism DA architecture for FIR[J]. Journal of terahertz science and electronic information technology, 2018, 16(1): 170.

参考文献

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林跃杉, 林郁, 尹韬, 黄志洪, 杨海钢. FIR基于 FPGA的高并行度 DA结构[J]. 太赫兹科学与电子信息学报, 2018, 16(1): 170. LIN Yueshan, LIN Yu, YIN Tao, HUANG Zhihong, YANG Haigang. FPGA based high parallelism DA architecture for FIR[J]. Journal of terahertz science and electronic information technology, 2018, 16(1): 170.

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